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| 1 | +// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD |
| 2 | +// |
| 3 | +// Licensed under the Apache License, Version 2.0 (the "License"); |
| 4 | +// you may not use this file except in compliance with the License. |
| 5 | +// You may obtain a copy of the License at |
| 6 | + |
| 7 | +// http://www.apache.org/licenses/LICENSE-2.0 |
| 8 | +// |
| 9 | +// Unless required by applicable law or agreed to in writing, software |
| 10 | +// distributed under the License is distributed on an "AS IS" BASIS, |
| 11 | +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 12 | +// See the License for the specific language governing permissions and |
| 13 | +// limitations under the License. |
| 14 | + |
| 15 | +#include"esp32-hal-adc.h" |
| 16 | +#include"freertos/FreeRTOS.h" |
| 17 | +#include"freertos/task.h" |
| 18 | +#include"rom/ets_sys.h" |
| 19 | +#include"esp_attr.h" |
| 20 | +#include"esp_intr.h" |
| 21 | +#include"soc/rtc_io_reg.h" |
| 22 | +#include"soc/rtc_cntl_reg.h" |
| 23 | +#include"soc/sens_reg.h" |
| 24 | + |
| 25 | +staticuint8_t__analogAttenuation=0;//0db |
| 26 | +staticuint8_t__analogWidth=3;//12 bits |
| 27 | +staticuint8_t__analogCycles=8; |
| 28 | +staticuint8_t__analogSamples=0;//1 sample |
| 29 | +staticuint8_t__analogClockDiv=1; |
| 30 | + |
| 31 | +void__analogSetWidth(uint8_tbits){ |
| 32 | +if(bits<9){ |
| 33 | +bits=9; |
| 34 | + } elseif(bits>12){ |
| 35 | +bits=12; |
| 36 | + } |
| 37 | +__analogWidth=bits-9; |
| 38 | +SET_PERI_REG_BITS(SENS_SAR_START_FORCE_REG, SENS_SAR1_BIT_WIDTH, __analogWidth, SENS_SAR1_BIT_WIDTH_S); |
| 39 | +SET_PERI_REG_BITS(SENS_SAR_READ_CTRL_REG, SENS_SAR1_SAMPLE_BIT, __analogWidth, SENS_SAR1_SAMPLE_BIT_S); |
| 40 | + |
| 41 | +SET_PERI_REG_BITS(SENS_SAR_START_FORCE_REG, SENS_SAR2_BIT_WIDTH, __analogWidth, SENS_SAR2_BIT_WIDTH_S); |
| 42 | +SET_PERI_REG_BITS(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_SAMPLE_BIT, __analogWidth, SENS_SAR2_SAMPLE_BIT_S); |
| 43 | +} |
| 44 | + |
| 45 | +void__analogSetCycles(uint8_tcycles){ |
| 46 | +__analogCycles=cycles; |
| 47 | +SET_PERI_REG_BITS(SENS_SAR_READ_CTRL_REG, SENS_SAR1_SAMPLE_CYCLE, __analogCycles, SENS_SAR1_SAMPLE_CYCLE_S); |
| 48 | +SET_PERI_REG_BITS(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_SAMPLE_CYCLE, __analogCycles, SENS_SAR2_SAMPLE_CYCLE_S); |
| 49 | +} |
| 50 | + |
| 51 | +void__analogSetSamples(uint8_tsamples){ |
| 52 | +if(!samples){ |
| 53 | +return; |
| 54 | + } |
| 55 | +__analogSamples=samples-1; |
| 56 | +SET_PERI_REG_BITS(SENS_SAR_READ_CTRL_REG, SENS_SAR1_SAMPLE_NUM, __analogSamples, SENS_SAR1_SAMPLE_NUM_S); |
| 57 | +SET_PERI_REG_BITS(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_SAMPLE_NUM, __analogSamples, SENS_SAR2_SAMPLE_NUM_S); |
| 58 | +} |
| 59 | + |
| 60 | +void__analogSetClockDiv(uint8_tclockDiv){ |
| 61 | +if(!clockDiv){ |
| 62 | +return; |
| 63 | + } |
| 64 | +__analogClockDiv=clockDiv; |
| 65 | +SET_PERI_REG_BITS(SENS_SAR_READ_CTRL_REG, SENS_SAR1_CLK_DIV, __analogClockDiv, SENS_SAR1_CLK_DIV_S); |
| 66 | +SET_PERI_REG_BITS(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_CLK_DIV, __analogClockDiv, SENS_SAR2_CLK_DIV_S); |
| 67 | +} |
| 68 | + |
| 69 | +void__analogSetAttenuation(uint8_tattenuation){ |
| 70 | +__analogAttenuation=attenuation&3; |
| 71 | +uint32_tatt_data=0; |
| 72 | +inti=8; |
| 73 | +while(i--){ |
| 74 | +att_data |= __analogAttenuation << (i*2); |
| 75 | + } |
| 76 | +SET_PERI_REG_BITS(SENS_SAR_MEAS_START1_REG, SENS_MEAS1_DATA_SAR, att_data, SENS_MEAS1_DATA_SAR_S); |
| 77 | +SET_PERI_REG_BITS(SENS_SAR_MEAS_START2_REG, SENS_MEAS2_DATA_SAR, att_data, SENS_MEAS2_DATA_SAR_S); |
| 78 | +} |
| 79 | + |
| 80 | +voidIRAM_ATTR__analogInit(){ |
| 81 | +staticboolinitialized= false; |
| 82 | +if(initialized){ |
| 83 | +return; |
| 84 | + } |
| 85 | +__analogSetAttenuation(__analogAttenuation); |
| 86 | +__analogSetCycles(__analogCycles); |
| 87 | +__analogSetSamples(__analogSamples+1);//in samples |
| 88 | +__analogSetClockDiv(__analogClockDiv); |
| 89 | +__analogSetWidth(__analogWidth+9);//in bits |
| 90 | + |
| 91 | +SET_PERI_REG_MASK(SENS_SAR_READ_CTRL_REG, SENS_SAR1_DATA_INV); |
| 92 | +SET_PERI_REG_MASK(SENS_SAR_READ_CTRL2_REG, SENS_SAR2_DATA_INV); |
| 93 | + |
| 94 | +SET_PERI_REG_MASK(SENS_SAR_MEAS_START1_REG, SENS_MEAS1_START_FORCE_M); //SAR ADC1 controller (in RTC) is started by SW |
| 95 | +SET_PERI_REG_MASK(SENS_SAR_MEAS_START1_REG, SENS_SAR1_EN_PAD_FORCE_M); //SAR ADC1 pad enable bitmap is controlled by SW |
| 96 | +SET_PERI_REG_MASK(SENS_SAR_MEAS_START2_REG, SENS_MEAS2_START_FORCE_M); //SAR ADC2 controller (in RTC) is started by SW |
| 97 | +SET_PERI_REG_MASK(SENS_SAR_MEAS_START2_REG, SENS_SAR2_EN_PAD_FORCE_M); //SAR ADC2 pad enable bitmap is controlled by SW |
| 98 | + |
| 99 | +CLEAR_PERI_REG_MASK(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR_M); //force XPD_SAR=0, use XPD_FSM |
| 100 | +SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_AMP, 0x2, SENS_FORCE_XPD_AMP_S); //force XPD_AMP=0 |
| 101 | + |
| 102 | +CLEAR_PERI_REG_MASK(SENS_SAR_MEAS_CTRL_REG, 0xfff << SENS_AMP_RST_FB_FSM_S); //clear FSM |
| 103 | +SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT1_REG, SENS_SAR_AMP_WAIT1, 0x1, SENS_SAR_AMP_WAIT1_S); |
| 104 | +SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT1_REG, SENS_SAR_AMP_WAIT2, 0x1, SENS_SAR_AMP_WAIT2_S); |
| 105 | +SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_SAR_AMP_WAIT3, 0x1, SENS_SAR_AMP_WAIT3_S); |
| 106 | +while (GET_PERI_REG_BITS2(SENS_SAR_SLAVE_ADDR1_REG, 0x7, SENS_MEAS_STATUS_S) !=0); //wait det_fsm== |
| 107 | + |
| 108 | +initialized= true; |
| 109 | +} |
| 110 | + |
| 111 | +uint16_tIRAM_ATTR__analogRead(uint8_tpin) |
| 112 | +{ |
| 113 | +int8_tchannel=digitalPinToAnalogChannel(pin); |
| 114 | +if(channel<0){ |
| 115 | +return0;//not adc pin |
| 116 | + } |
| 117 | +int8_tpad=digitalPinToTouchChannel(pin); |
| 118 | + |
| 119 | +if(pad >= 0){ |
| 120 | +uint32_ttouch=READ_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG); |
| 121 | +if(touch& (1 << pad)){ |
| 122 | +touch &= ~((1 << (pad+SENS_TOUCH_PAD_OUTEN2_S)) |
| 123 | + | (1 << (pad+SENS_TOUCH_PAD_OUTEN1_S)) |
| 124 | + | (1 << (pad+SENS_TOUCH_PAD_WORKEN_S))); |
| 125 | +WRITE_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG, touch); |
| 126 | + } |
| 127 | + } elseif(pin==25){ |
| 128 | +CLEAR_PERI_REG_MASK(RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_XPD_DAC | RTC_IO_PDAC1_DAC_XPD_FORCE);//stop dac1 |
| 129 | + } elseif(pin==26){ |
| 130 | +CLEAR_PERI_REG_MASK(RTC_IO_PAD_DAC2_REG, RTC_IO_PDAC2_XPD_DAC | RTC_IO_PDAC2_DAC_XPD_FORCE);//stop dac2 |
| 131 | + } |
| 132 | + |
| 133 | +pinMode(pin, ANALOG); |
| 134 | + |
| 135 | +__analogInit(); |
| 136 | + |
| 137 | +if(channel>7){ |
| 138 | +channel-=10; |
| 139 | + |
| 140 | +SET_PERI_REG_BITS(SENS_SAR_MEAS_START2_REG, SENS_SAR2_EN_PAD, (1 << channel), SENS_SAR2_EN_PAD_S); |
| 141 | +CLEAR_PERI_REG_MASK(SENS_SAR_MEAS_START2_REG, SENS_MEAS2_START_SAR_M); |
| 142 | +SET_PERI_REG_MASK(SENS_SAR_MEAS_START2_REG, SENS_MEAS2_START_SAR_M); |
| 143 | +while (GET_PERI_REG_MASK(SENS_SAR_MEAS_START2_REG, SENS_MEAS2_DONE_SAR) ==0){}; //read done |
| 144 | +returnGET_PERI_REG_BITS2(SENS_SAR_MEAS_START2_REG, SENS_MEAS2_DATA_SAR, SENS_MEAS2_DATA_SAR_S); |
| 145 | + } |
| 146 | + |
| 147 | +SET_PERI_REG_BITS(SENS_SAR_MEAS_START1_REG, SENS_SAR1_EN_PAD, (1 << channel), SENS_SAR1_EN_PAD_S); |
| 148 | +CLEAR_PERI_REG_MASK(SENS_SAR_MEAS_START1_REG, SENS_MEAS1_START_SAR_M); |
| 149 | +SET_PERI_REG_MASK(SENS_SAR_MEAS_START1_REG, SENS_MEAS1_START_SAR_M); |
| 150 | +while (GET_PERI_REG_MASK(SENS_SAR_MEAS_START1_REG, SENS_MEAS1_DONE_SAR) ==0){}; //read done |
| 151 | +returnGET_PERI_REG_BITS2(SENS_SAR_MEAS_START1_REG, SENS_MEAS1_DATA_SAR, SENS_MEAS1_DATA_SAR_S); |
| 152 | +} |
| 153 | +int__hallRead() //hall sensor without LNA |
| 154 | +{ |
| 155 | +intSens_Vp0; |
| 156 | +intSens_Vn0; |
| 157 | +intSens_Vp1; |
| 158 | +intSens_Vn1; |
| 159 | + |
| 160 | +pinMode(36, ANALOG); |
| 161 | +pinMode(39, ANALOG); |
| 162 | +SET_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL1_REG, SENS_XPD_HALL_FORCE_M); // hall sens force enable |
| 163 | +SET_PERI_REG_MASK(RTC_IO_HALL_SENS_REG, RTC_IO_XPD_HALL); // xpd hall |
| 164 | +SET_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL1_REG, SENS_HALL_PHASE_FORCE_M); // phase force |
| 165 | +CLEAR_PERI_REG_MASK(RTC_IO_HALL_SENS_REG, RTC_IO_HALL_PHASE); // hall phase |
| 166 | +Sens_Vp0=__analogRead(36); |
| 167 | +Sens_Vn0=__analogRead(39); |
| 168 | +SET_PERI_REG_MASK(RTC_IO_HALL_SENS_REG, RTC_IO_HALL_PHASE); |
| 169 | +Sens_Vp1=__analogRead(36); |
| 170 | +Sens_Vn1=__analogRead(39); |
| 171 | +SET_PERI_REG_BITS(SENS_SAR_MEAS_WAIT2_REG, SENS_FORCE_XPD_SAR, 0, SENS_FORCE_XPD_SAR_S); |
| 172 | +CLEAR_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL1_REG, SENS_XPD_HALL_FORCE); |
| 173 | +CLEAR_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL1_REG, SENS_HALL_PHASE_FORCE); |
| 174 | +return (Sens_Vp1-Sens_Vp0) - (Sens_Vn1-Sens_Vn0); |
| 175 | +} |
| 176 | + |
| 177 | +externuint16_tanalogRead(uint8_tpin) __attribute__ ((weak, alias("__analogRead"))); |
| 178 | +externvoidanalogSetWidth(uint8_tbits) __attribute__ ((weak, alias("__analogSetWidth"))); |
| 179 | +externvoidanalogSetCycles(uint8_tcycles) __attribute__ ((weak, alias("__analogSetCycles"))); |
| 180 | +externvoidanalogSetSamples(uint8_tsamples) __attribute__ ((weak, alias("__analogSetSamples"))); |
| 181 | +externvoidanalogSetClockDiv(uint8_tclockDiv) __attribute__ ((weak, alias("__analogSetClockDiv"))); |
| 182 | +//extern void analogSetAttenuation(uint8_t attenuation) __attribute__ ((weak, alias("__analogSetAttenuation"))); |
| 183 | +externinthallRead() __attribute__ ((weak, alias("__hallRead"))); |
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